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Interface Concept IC-INT-VPX6d

IC-INT-VPX6d: 6U VPX dual Xeon D-1500, 128GB ECC, FPGA & 10GbE. Milexia HPEC for Europe.

This product is available from Milexia Iberica

Discover Interface Concept IC-INT-VPX6d: Milexia’s HPEC Powerhouse

The IC-INT-VPX6d is a 6U VPX single board computer from Interface Concept, featuring dual Intel® Xeon® D-1500 processors for high-performance embedded computing (HPEC) in defense, radar, and signal processing applications.

Distributed by Milexia across Europe, it delivers up to 128GB DDR4 ECC memory with controlled power consumption via OpenVPX standards.

Key Features and Benefits about IC-INT-VPX6d

Milexia supplies the IC-INT-VPX6d with pan-European engineering support and customization, extending beyond Spain for seamless integration in demanding mil-aero systems.

Air- or conduction-cooled options ensure reliability in extreme conditions, with FPGA acceleration and PCIe switching for scalable data planes.

  • Dual Intel® Xeon® D-1500 (up to 12 cores each) with TPM 2.0 for secure, high-throughput processing.
  • PCIe Gen2/Gen3 switch: 16 lanes on P1/P2 (configurable x16, x8/x8), inter-CPU x4 link.
  • Ethernet: 7x GbE ports (2x 1000BASE-T, 5x 1000BASE-BX), 2x rear 10GBASE-KR.
  • Node A extensions: XMC slot (PCIe x8), AMD Kintex™ 7 FPGA (4x MGT to P4, 16 diff pairs to P3).
  • Per-processor I/O: 2x USB, console, 2x SATA, GPIOs; BMC (VITA 46.11) for management.
  • Rugged temps: -40°C to 85°C conduction-cooled; shock up to 40G, vibration 0.1g²/Hz.

Optimized for Milexia’s high-reliability sectors like aerospace and security.

Why Choose Through Milexia?

Milexia, Europe’s trusted distributor, provides the IC-INT-VPX6d with long-term support, boot loader security, and system design expertise for HPEC deployments.

Enable mission-critical performance with Milexia’s comprehensive solutions.

Technical Specs

  • Processors/Memory: 2x Intel® Xeon® D-1500; up to 64GB DDR4 ECC/node (128GB total); onboard SATA SSD up to 64GB.
  • Fabric: PCIe x8/node to switch; GbE switch low-latency.
  • Backplane I/O: Data/Expansion Plane: 16 lanes P1 + optional 12 lanes P2; 20 diff pairs Pn6 to P6 (X12d+X8d).
  • FPGA: AMD Kintex™ 7 on Node A.
  • Standards: VITA 46.0 OpenVPX (6U x 5HP); air/conduction-cooled.
  • Misc: Power/temp monitoring, status LEDs, JTAG debug, 6U RTM.

Resources

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